Problem with table entry for STASG

[Peter Kuschnerus]

Hello,

Table entry STASG:
In my port I need for the source operand the addressing mode
"register indirect"
and I need for the destination the addressing mode "register indirect".
For the source operand, there is no problem to write the line:
SAREG, TPOINT,
but if I try the same for the destination operand,
the compiler complains:
Cannot generate code, ...
If I look at samples of other arch,
I see that there SOREG is used.
But OREG is not ok for me because I have no offset at this place,
My addressing mode "register indirect" has similar semantic as OREG
but without offset.
I wonder if I do something wrong or of it is not possible
to use this addressing mode.

The table entry that was complained about looked like this:
{ STASG, INAREG|FOREFF,
SAREG, TPOINT,
SAREG, TPOINT,
2*NAREG, RDEST,
"ZQ", }

Regards
Peter Kuschnerus

[Peter Kuschnerus]

Post by Peter Kuschnerus
Hello,
I wonder if I do something wrong or of it is not possible
to use this addressing mode.
{ STASG, INAREG|FOREFF,
SAREG, TPOINT,
SAREG, TPOINT,
2*NAREG, RDEST,
"ZQ", }

Please can anyone give a hint,
what I am doing wrong with STASG ??

Regards
Peter Kuschnerus

[Anders Magnusson]

Post by Peter Kuschnerus

Post by Peter Kuschnerus
Hello,
I wonder if I do something wrong or of it is not possible
to use this addressing mode.
{ STASG, INAREG|FOREFF,
SAREG, TPOINT,
SAREG, TPOINT,
2*NAREG, RDEST,
"ZQ", }

Please can anyone give a hint,
what I am doing wrong with STASG ??

Hi,

left node of a STASG must be a memory reference, hence you cannot have
a register there but must have an OREG or NAME.

-- Ragge

[Peter Kuschnerus]

Post by Anders Magnusson
left node of a STASG must be a memory reference, hence you cannot have
a register there but must have an OREG or NAME.

Yes of course, I did mean a memory reference, but without offset.
This is the point,
at right node of STASG, a memory reference without offset is possible.
At left node memory reference only with offset seem to be possible.
why ???

If I specify OREG, it works, but suboptimal,
because then this causes the table enty to accept any offset.
That forces me to specify there instructions accepting an offset,
even if there is no offset.
Then I get code mosty adding an useless zero-offet.

If I interprete it right, at left node a memory reference without offset is not
possible in table entry STASG ???

Regards
Peter Kuschnerus

[Anders Magnusson]

Post by Peter Kuschnerus

Post by Anders Magnusson
left node of a STASG must be a memory reference, hence you cannot have
a register there but must have an OREG or NAME.

Yes of course, I did mean a memory reference, but without offset.
This is the point,
at right node of STASG, a memory reference without offset is possible.
At left node memory reference only with offset seem to be possible.
why ???

The matching code do not care about whether an OREG has offset or not,
that is only depending on what you have matched in offstar() and converted
to in myormake(). If there is an OREG of it will match whether there is
an offset or not.

...or maybe you are converting to STARREG or so, then you need to add
that also.

If you need different code for offset or no offset either use STARREG or
look in
the zzz-code if there is an offset or not when you output instructions.

-- Ragge

Post by Peter Kuschnerus
If I specify OREG, it works, but suboptimal,
because then this causes the table enty to accept any offset.
That forces me to specify there instructions accepting an offset,
even if there is no offset.
Then I get code mosty adding an useless zero-offet.
If I interprete it right, at left node a memory reference without offset is not
possible in table entry STASG ???
Regards
Peter Kuschnerus